/*	$Id: db64360.h,v 1.1 2002/08/19 09:08:59 pefo Exp $ */

/*
 * Copyright (c) 2002 Opsycon AB  (www.opsycon.se)
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by
 *	Opsycon Open System Consulting AB, Sweden.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#ifndef _DB64360_H_
#define _DB64360_H_

/*
 *  Define top of PMON-land. PMON will not use memory above this
 *  address but leave it alone for applications.
 */
//#define	PMON_TOP		0x00200000	/* 2MB */

/*
 *  CS space mapping.
 */
#ifdef GT_HIGH
#define	OC_SRAM_BASE		0x42000000	/* On-Chip SRAM */
#define	OC_SRAM_SIZE		0x00040000	/* 256K */
#define	SRAM_BASE		0xbc000000	/* Device module SRAM */
#define	SRAM_SIZE		0x00800000
#define	RTC_BASE		0xbc800000
#define	RTC_SIZE		0x00800000
#define	UART_BASE		0xbd000000
#define	UART_SIZE		0x00800000
#define	FLASH_BASE		0xba000000
#define	FLASH_SIZE		0x02000000
#else
#define	OC_SRAM_BASE		0x42000000	/* On-Chip SRAM */
#define	OC_SRAM_SIZE		0x00040000	/* 256K */
#define	SRAM_BASE		0x1c000000	/* Device module SRAM */
#define	SRAM_SIZE		0x00800000
#define	RTC_BASE		0x1c800000
#define	RTC_SIZE		0x00800000
#define	UART_BASE		0x1d000000
#define	UART_SIZE		0x00800000
#define	FLASH_BASE		0x1a000000
#define	FLASH_SIZE		0x02000000
#endif
#define	BOOT_BASE		0xfe000000
#define	BOOT_SIZE		0x02000000

/*
 *  PCI Bus allocation
 */
#define PCI0_MEM_SPACE_BASE     0xc0000000
#define PCI0_MEM_SPACE_SIZE     0x10000000
#define PCI0_IO_SPACE_BASE      0xe0000000
#define PCI0_IO_SPACE_SIZE      0x08000000

#define PCI1_MEM_SPACE_BASE     0xd0000000
#define PCI1_MEM_SPACE_SIZE     0x10000000
#define PCI1_IO_SPACE_BASE      0xe8000000
#define PCI1_IO_SPACE_SIZE      0x08000000

#define	ISA_IO_BASE		PCI_IO_BASE

/*
 *  NVRAM mapping
 */
#ifdef NVRAM_IN_FLASH

#define	NVRAM_SIZE		0x00010000
#define	NVRAM_SECSIZE		0x00010000
#define	NVRAM_OFFS		0x00000000
#ifdef not_very_likely
#define NVRAM_VXWORKS		(NVRAM_OFFS + NVRAM_SIZE)
#define NVRAM_VXWORKS_DEFAULT \
"dc(0,0)host:/usr/vw/config/db64360/vxWorks h=90.0.0.3 e=90.0.0.50 u=target"
#endif

#else	/* Use clock ram, 256 bytes only */
#define	NVRAM_SIZE		250
#define	NVRAM_SECSIZE		NVRAM_SIZE	/* Helper */
#define	NVRAM_OFFS		0
#define	ETHER_OFFS		250		/* Ethernet address base */

#endif

/*
 *  Device module flash memory.
 */
#define	GT_DM_FLASH	FLASH_BASE

/*
 *  Device module duart I/O ports.
 */
#define COM1_BASE_ADDR	(UART_BASE + 0x20)	/* Com 1 */
#define COM2_BASE_ADDR	(UART_BASE + 0x00)	/* Com 2 */
#define	NS16550HZ	3686400
#define GT_COM1   	1 
#define GT_COM2   	2 
/* Sparse addressing on serial chip bus */
#define nsreg(x)        unsigned char x;unsigned char CAT(pad_,x)[3];

#define	DBGLED0_ON	(RTC_BASE + 0x08000)
#define	DBGLED1_ON	(RTC_BASE + 0x0c000)
#define	DBGLED2_ON	(RTC_BASE + 0x10000)
#define	DBGLED0_OFF	(RTC_BASE + 0x14000)
#define	DBGLED1_OFF	(RTC_BASE + 0x18000)
#define	DBGLED2_OFF	(RTC_BASE + 0x1c000)

#endif