/*	$Id: powerpmc230.h,v 1.2 2002/02/28 21:58:08 patrik Exp $ */

/*
 * Copyright (c) 2001 ipUnplugged AB   (www.ipunplugged.com)
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by ipUnplugged AB
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#ifndef __POWERPMC230_H__
#define __POWERPMC230_H__

#include <pmon/dev/mpc107reg.h>

#define PCI_ISA_IO_SPACE	MPC107_PCI_ISA_IO_BASE
#define PCI_MEM_BASE		MPC107_PCI_MEM_BASE

/*
 *  I/O ports.
 */

#define	CLOCK_ADDR		(MPC107_PCI_ISA_IO_BASE + 0x070)
#define	CLOCK_DATA		(MPC107_PCI_ISA_IO_BASE + 0x071)

#define BOOTFLASH_BASE		0xfff00000
#define BOOTFLASH_END		0xffffffff
#define BOOTFLASH_SIZE		(BOOTFLASH_END - BOOTFLASH_BASE)
#define USERFLASH_BASE		0x7c000000


/*
 * Configuration Register
 */
#define CONFIG_REGISTER		0x78000000
#define CFG_REG_MASK		0xFFFC0000

#define	CFG_REG_L2SPEED_SHIFT	29
#define	CFG_REG_L2SPEED_MASK	0x07
#define	CFG_REG_L2SPEED(cr) \
	    (((cr) >> CFG_REG_L2SPEED_SHIFT) & CFG_REG_L2SPEED_MASK)

#define	CFG_REG_L2SIZE_SHIFT	18
#define	CFG_REG_L2SIZE_MASK	0x03
#define	CFG_REG_L2SIZE(cr) \
	    (((cr) >> CFG_REG_L2SIZE_SHIFT) & CFG_REG_L2SIZE_MASK)

#define	CFG_REG_FLASHSIZE_SHIFT	25
#define	CFG_REG_FLASHSIZE_MASK	0x01
#define	CFG_REG_FLASHSIZE(cr) \
	    (((cr) >> CFG_REG_FLASHSIZE_SHIFT) & CFG_REG_FLASHSIZE_MASK)

#define	CFG_REG_REV_SHIFT	27
#define	CFG_REG_REV_MASK	0x03
#define	CFG_REG_REV(cr) \
	    (((cr) >> CFG_REG_REV_SHIFT) & CFG_REG_REV_MASK)

#define	CFG_REG_MONARCH_SHIFT	23
#define	CFG_REG_MONARCH_MASK	0x03
#define	CFG_REG_MONARCH(cr) \
	    (((cr) >> CFG_REG_MONARCH_SHIFT) & CFG_REG_MONARCH_MASK)

#define	CFG_REG_PROCESSOR_TYPE_SHIFT	26
#define	CFG_REG_PROCESSOR_TYPE_MASK	0x01
#define	CFG_REG_PROCESSOR_TYPE(cr) \
	    (((cr) >> CFG_REG_PROCESSOR_TYPE_SHIFT) & CFG_REG_PROCESSOR_TYPE_MASK)

#define	CFG_REG_MEMBUS_SPEED_SHIFT	24
#define	CFG_REG_MEMBUS_SPEED_MASK	0x01
#define	CFG_REG_MEMBUS_SPEED(cr) \
	    (((cr) >> CFG_REG_MEMBUS_SPEED_SHIFT) & CFG_REG_MEMBUS_SPEED_MASK)

#define	CFG_REG_EREADY_SHIFT		22
#define	CFG_REG_EREADY_MASK		0x01
#define	CFG_REG_EREADY(cr) \
	    (((cr) >> CFG_REG_EREADY_SHIFT) & CFG_REG_EREADY_MASK)

#define	CFG_REG_JP3_SHIFT		21
#define	CFG_REG_JP3_MASK		0x01
#define	CFG_REG_JP3(cr) \
	    (((cr) >> CFG_REG_JP3_SHIFT) & CFG_REG_JP3_MASK)

#define	CFG_REG_CTLT3N_2P_SHIFT		20
#define	CFG_REG_CTLT3N_2P_MASK		0x01
#define	CFG_REG_CTLT3N_2P(cr) \
	    (((cr) >> CFG_REG_CTLT3N_2P_SHIFT) & CFG_REG_CTLT3N_2P_MASK)


#ifdef POCONO 
#define COM1_BASE_ADDR		PCI_ISA_IO_SPACE+0x2f8
#else
#define COM1_BASE_ADDR		0xff000000
#endif

/*
 *  NV-Ram.
 */
#define NVRAM_BASE		(BOOTFLASH_BASE + 0xF0000)
#define NVRAM_SIZE		0x7F00	/* How many bytes */
#define NVRAM_OFFS		0x0000
#define NVRAM_MAXSIZE		0xffff

#ifdef VXWORKS
#define	NVRAM_VXWORKS		(NVRAM_BASE + 0x7f00)
#define	NVRAM_VXWORKS_DEFAULT \
"dc(0,0)host:/usr/vw/config/powerpmc230/vxWorks h=90.0.0.3 e=90.0.0.50 u=target"
#endif /* VXWORKS */

#endif /* __POWERPMC230_H__ */