/*
 * Copyright (c) 2004 PMC-Sierra, Inc.  (www.pmc-sierra.com)
 *	Author: brad_larson@pmc-sierra.com
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by PMC-Sierra, Inc.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#if !defined(_RM9000_DMA_H_)
#define _RM9000_DMA_H_

/*
 *  DMA Controller registers
 */
#define RM9000_DMA_CHAIN_CONTROL		0x0808	/* DMA Chain Control */
#define RM9000_DMA_CHAN0_PARAM			0x1810	/* DMA Channel 0 Parameter */
#define RM9000_DMA_CHAN1_PARAM			0x1814	/* DMA Channel 1 Parameter */
#define RM9000_DMA_CHAN2_PARAM			0x2810	/* DMA Channel 2 Parameter */
#define RM9000_DMA_CHAN3_PARAM			0x2814	/* DMA Channel 3 Parameter */

#define RM9000_DMA_CHAN0_BYTE_COUNT		0x1820	/* DMA Channel 0 Byte Count */
#define RM9000_DMA_CHAN0_SOURCE_ADDR_LO		0x1828	/* DMA Channel 0 Source Address Low */
#define RM9000_DMA_CHAN0_SOURCE_ADDR_HI		0x182c	/* DMA Channel 0 Source Address High */
#define RM9000_DMA_CHAN0_DEST_ADDR_LO		0x1830	/* DMA Channel 0 Destination Address Low */
#define RM9000_DMA_CHAN0_DEST_ADDR_HI		0x1834	/* DMA Channel 0 Destination Address High */
#define RM9000_DMA_CHAN0_NEXT_PTR_LO		0x1838	/* DMA Channel 0 Next Pointer Low */
#define RM9000_DMA_CHAN0_NEXT_PTR_HI		0x183c	/* DMA Channel 0 Next Pointer High */

#define RM9000_DMA_CHAN1_BYTE_COUNT		0x1840	/* DMA Channel 1 Byte Count */
#define RM9000_DMA_CHAN1_SOURCE_ADDR_LO		0x1848	/* DMA Channel 1 Source Address Low */
#define RM9000_DMA_CHAN1_SOURCE_ADDR_HI		0x184c	/* DMA Channel 1 Source Address High */
#define RM9000_DMA_CHAN1_DEST_ADDR_LO		0x1850	/* DMA Channel 1 Destination Address Low */
#define RM9000_DMA_CHAN1_DEST_ADDR_HI		0x1854	/* DMA Channel 1 Destination Address High */
#define RM9000_DMA_CHAN1_NEXT_PTR_LO		0x1858	/* DMA Channel 1 Next Pointer Low */
#define RM9000_DMA_CHAN1_NEXT_PTR_HI		0x185c	/* DMA Channel 1 Next Pointer High */

#define RM9000_DMA_CHAN2_BYTE_COUNT		0x2820	/* DMA Channel 2 Byte Count */
#define RM9000_DMA_CHAN2_SOURCE_ADDR_LO		0x2828	/* DMA Channel 2 Source Address Low */
#define RM9000_DMA_CHAN2_SOURCE_ADDR_HI		0x282c	/* DMA Channel 2 Source Address High */
#define RM9000_DMA_CHAN2_DEST_ADDR_LO		0x2830	/* DMA Channel 2 Destination Address Low */
#define RM9000_DMA_CHAN2_DEST_ADDR_HI		0x2834	/* DMA Channel 2 Destination Address High */
#define RM9000_DMA_CHAN2_NEXT_PTR_LO		0x2838	/* DMA Channel 2 Next Pointer Low */
#define RM9000_DMA_CHAN2_NEXT_PTR_HI		0x283c	/* DMA Channel 2 Next Pointer High */

#define RM9000_DMA_CHAN3_BYTE_COUNT		0x2840	/* DMA Channel 3 Byte Count */
#define RM9000_DMA_CHAN3_SOURCE_ADDR_LO		0x2848	/* DMA Channel 3 Source Address Low */
#define RM9000_DMA_CHAN3_SOURCE_ADDR_HI		0x284c	/* DMA Channel 3 Source Address High */
#define RM9000_DMA_CHAN3_DEST_ADDR_LO		0x2850	/* DMA Channel 3 Destination Address Low */
#define RM9000_DMA_CHAN3_DEST_ADDR_HI		0x2854	/* DMA Channel 3 Destination Address High */
#define RM9000_DMA_CHAN3_NEXT_PTR_LO		0x2858	/* DMA Channel 3 Next Pointer Low */
#define RM9000_DMA_CHAN3_NEXT_PTR_HI		0x285c	/* DMA Channel 3 Next Pointer High */

#endif /* !defined(_RM9000_DMA_H_) */